Synchronization -

Synchronization between two boards is done through the SYNCOUT and SYNCIN connectors. We call the signal sent through the SYNCOUT connector SYNCO and the signal sent through the SYNCIN connector SYNCI so we do not confuse the connectors and the actual signals. For multiple board operation, there must always be a Master board. The Master board will send out the SYNCO signal through the SYNCOUT connector and the Slave boards will receive that signal through their SYNCIN connectors. Inside the Slave boards, the signal from SYNCIN is called SYNCI. The Slave SYNCI signals will always match the Master SYNCO signal.

SYNCO SYNCI

It is important to note that waveform generation starts ONLY based on the SYNCI signal (and only when DSM is in the "Triggered" state), even in the Master board and when in Standalone operation. The user may then wonder where does the Master board or the Standalone board receive its SYNCI signal? Normally, the user would have the Internal SYNCI option checked in which case the SYNCI signal would mirror the internally generated SYNCO signal. Other times, you may wish to split the SYNCO signal and connect one end to the Slave SYNCIN connector and the other end to the Master SYNCIN connector. In this case, you would have the Internal SYNCI option unchecked in the DSM application so that the Master SYNCI signal would mirror the output through the SYNCOUT connector on the Master board.

The diagram below illustrates the signal timeline of a Master and Slave board with the Internal SYNCI enabled on the Master board. The board is assumed to already have been in the "Armed" state.

Signal Timelines


The "TRIG" signal at the top can represent either the input at the TRIG connector or the use of the TRIG button on the Master board. Before the falling edge of the SYNCI signal, the board is considered to be in the “Triggered” state.

The SYNCI signal mirrors the SYNCO signal so both signals are always the same if Internal SYNCI is enabled. In the above diagram, the “SYNCO” represents the SYNCO signal of the Master board while the “SYNCI” represents each of the SYNCI signals of the Master and Slave boards. Since the SYNCO and the SYNCI signals are the same, for convenience we will use "SYNC" when referring to either of the signals.


TSYNC1

As can be seen in the closeup below, the SYNC signals do not fall immediately after the TRIG signal falls. Instead, there is a delay which is programmable by the user. This delay is called TSYNC1 and is defined by the first box to the right of SYNCO in the DSM application. Normally, if you want the SYNC signals to drop with minimum delay after the trigger signal, you should make TSYNC1 = 0.

TSYNC1

The following is a graph of TSYNC1 lengths and the resulting delay from the time the trigger signal falls to the time the SYNCO signal falls.

TSYNC2 Graph

The graph shows that the minimum delay is about 2.8 microseconds and that increasing TSYNC1 (the first box to the right of SYNCO in the Module Parameters window) by one adds about 0.32 microseconds to the delay.


Latency

When the SYNCI signal falls from logical level high to low, the board changes state from "Triggered" to "In Loop". Waveform output does not start immediately and is instead delayed for a short time. This is the latency time and is inherent to the board and cannot be adjusted. The average latency time is about 30 nanoseconds.

Latency


TSYNC2

The SYNC signals do not immediately rise to high after falling to low. Instead, there is a second delay which is programmable by the user. This delay is called TSYNC2 and is defined by the second box to the right of SYNCO in the DSM application. When you are not using the Internal SYNCI the application will wait the TSYNC2 delay before automatically dropping the SYNCI signal. This is done so that the states will continue to change instead of waiting for a signal that might never come.

TSYNC2

The following is a graph of TSYNC2 lengths and the resulting delay from the time the SYNCO signal falls to the time it rises again.

TSYNC2 Graph

The graph shows that the minimum delay is about 0.64 microseconds and that increasing TSYNC2 (the second box to the right of SYNCO in the Module Parameters window) by one adds about 0.32 microseconds to the delay.



Once the SYNC signals go back up to high, the board will return to "Triggered" state when the waveform loop is completed if Auto Arm is enabled.