8 GSPS DAC FMC Module - FMC201

General Description

The Euvis FMC201 module is a high-speed single-channel FMC module ideal for use in leading-edge applications. The FMC201 generates CW waveforms with sampling rates up to 8 GSPS. The FMC201 module is equipped with the Euvis MD662H digital-to-analog converter (DAC). At 8 GSPS, the module provides analog outputs with bandwidth from DC to 4 GHz (Nyquist bandwidth). In addition to the 4:1 internal multiplexer of the MD662H, the module includes four 2:1 high-speed Euvis MX2412H multiplexers to further lower the input data rate and can directly accept advanced FPGA LVDS outputs. The total multiplex ratio is 8:1 and the required digital data rate is 1 Gb/s when the DAC is operated at 8 GSPS. The 96 LVDS pairs of digital data are fed through two FMC connectors, a high-pin-count (HPC) and a low-pin-count (LPC) connector. Sampling window select (SEL’s) and reset signals of the DAC can be independently controlled via the FMC connectors. The module includes three clock buffers to relax the need of high-power clock source. The amplitudes and duty cycles of the clock buffers can be programmed though the I2C interface.

DataSheet

Ordering and Pricing Information

For pricing information, please visit Pricing.
For formal quotations, availabilities, and quantity-specific orders, please e-mail info@euvis.com, or call 1-805-583-9888.

Key Features


Applications

The FMC201 module can generate arbitrary patterns with high sample rates to be used for a variety of leading-edge applications, such as:


Module Photo:

 


Functional Block Diagram

 


Functional Specifications

General
Amplitude Resolution 1 CH x 12 bits
Double Edge Sampling Clock rate is half of sampling rate
Sampling 1 ~ 8 GSPS
Input Clock
Type Single Ended, 50-Ω terminated
Connector Type SMA
Frequency Range 0.5 ~ 4 GHz 
Power Level +3 to +10 dBm (typical +6 dBm)
Analog Outputs
Type  Differential, 50-Ω terminated
Connector Type SMA
Output Bandwidth DC ~ 4 GHz 
Output Level -635 mV to 0 V
Output Power 0 ~ -4 dBm
Residual Phase Noise @ 10kHz from Carrier < -130 dBc/Hz
Output Return Loss 15 dB
Digital Data Inputs
Connector FMC High-Pin Count (HPC) and Low-Pin Count (LPC)
Logic LVDS
Data MUX Ratio 8 : 1
Data Width 96 pairs
DAC Control
DAC Reset FMC, LVDS Pairs
DAC Sampling Window Select FMC, LVCOMS25
Clock Buffer Control
Clock Amplitude FMC, I2C
Clock Duty Cycle FMC, I2C
Required DC Supplies
+ 12V 1.5 A
+ 3.3V 150 mA




Board Dimensions (mm) 

Edge Length (mm)
a 139 b 61.7 c 2.4
d 9.1 e 2.1 f 8
g 131.3 h 21.9 i 3
j 56.9 Width 139 Height  78.8



Test Setup


In applications, FMC201 requires a VITA 57.1-compliant carrier board to provide all digital data, DAC controls, I2C signals, and DC power via FMC connectors. The carrier is required to provide both +12V and +3.3V power, with minimum current capacities of 2A and 500mA respectively. Digital data and DAC resets are in LVDS pairs. The DAC sampling selects and return-to-zero mode select are single-ended LVCMOS25. The carrier board can be an advanced FPGA evaluation board, such as Xilinx VC707, with proper configurations.

The FMC201 module is tested using Euvis carrier FMCC371. The carrier consists of a Xilinx XC6VLX130T, a USB controller, and power modules. In the test setup, the carrier is controlled by a PC host via the USB interface. The carrier can store up to 32K words of data in memory. The maximum data length is 4 μs at 8 GSPS for each channel. Several built-in waveforms are available within the FMC GUI. Waveform generation and download are performed in the GUI.

3319 Old Conejo Rd., Newbury Park, CA 91320 | Tel: 805-583-9888 | Fax: 805-583-9889 | info@euvis.com